Our invention relates to the fabrication of printed circuits, and is directed more specifically to a process for fabricating printed circuits or printed circuit boards by plating. The process according to our invention is particularly well adapted for the automatic, continuous fabrication of printed circuits.
Of the numerous processes known and used in the fabrication of printed circuits, the wet etching process has had perhaps the most extensive acceptance in the industry, especially for the manufacture of high quality printed circuits. This prior art process is rather complex, however, involving the steps of cladding a base of electrically insulating material with a copper foil, forming an etchant-resist mask or pattern on the copper foil, etching away those areas of the copper foil which are exposed through the etchant-resist mask, and applying an overlay on the copper circuit pattern. Although these individual steps may be automated, it is difficult to integrate all the steps into an automatic procedure, so that this known process is not suitable for the economical manufacture of high quality printed circuits.
The wet etching process has another serious problem arising from the fact that up to about 60% or more of the copper foil over the insulating base must be removed in an etchant bath containing ferric chloride, cupric chloride, ammonium persulfate or the like. There are difficulties involved in recovery of the dissolved copper from the etchant and in regeneration of the etchant for repeated use, thus necessitating a further increase in the manufacturing costs of the printed circuits. An additional problem resides in the disposal of the waste liquid, which requires considerable expenses for the installation and maintenance of the necessary equipment.
In an attempt to overcome the above noted problems arising from the removal of a large proportion of the copper foil from the insulating base, there has been suggested a process wherein a circuit pattern is formed by electroplating of copper. The conventional plating process, however, permits current densities up to about 0.2 ampere per square centimeter, with the consequent copper deposition rate of only about 2 microns per minute at the maximum. Such a low deposition rate makes it practically impossible to synchronize the plating operation with other steps of, for example, bonding the deposited circuit pattern to an insulating base or bonding an overlay to the circuit pattern.
Furthermore, according to the prior art wet etching and plating processes, which are both difficult of automation as above explained, the produced circuit patterns are usually left exposed for a certain length of time, thereby giving rise to the possibility of their rusting. The prior art plating process has an additional problem in connection with the step of roughening the surface of a circuit pattern to strengthen its adhesion to an insulating base through increase of the surface area. Heretofore, this operation has been performed independently of the plating of the circuit pattern, as after the oxidation treatment. The independent surface roughening operation adds to the manufacturing cost and also has been an impediment to the full automation of the process.